Last updated: 2025-12-04

😄 About Me


I received my Ph.D. degree from Shanghai Jiao Tong University (SJTU), under the supervision of Prof. Lei He (IEEE Fellow). I am also a research intern at the Eastern Institute of Technology (EIT), Ningbo. I obtained my B.S. and M.S. degrees from Xidian University.

📄 Download CV

🎯 Research Interests

  • Design
  • Optimization
  • Development
  • Hardwar
  • Models

🎓 Education

  • Shanghai Jiao Tong University
    Ph.D. (2022.09 – 2026.06)
  • Xidian University
    Master (2019.09 – 2022.06)
  • Xidian University
    Bachelor (2015.09 – 2019.06)


🏆 Awards


  • 2026.06:  🏅 , Outstanding Graduate of the Class of 2026, Shanghai Jiao Tong University.


📚 Publications


  • [1] CCF-A ASPLOS 2026 DFVG: A Heterogeneous Architecture for Speculative Decoding with Draft-on-FPGA and Verify-on-GPU. Shaoqiang Lu*, Yangbo Wei*, Junhong Qian, Dongge Qin, Shiji Gao, Yizhi Ding, Qifan Wang, Chen Wu, Xiao Shi, Lei He.
  • [2] CCF-A DAC 2025 MambaOPU: An FPGA Overlay Processor for State-space-duality-based Mamba Models. Shaoqiang Lu*, Xuliang Yu*, Tiandong Zhao, Siyuan Miao, Xinsong Sheng, Chen Wu, Liang Zhao, Ting-Jung Lin, Lei He.
  • [3] CCF-B ICCAD 2025 MoE-OPU: An FPGA Overlay Processor Leveraging Expert Parallelism for MoE-based Large Language Models. Shaoqiang Lu*, Yangbo Wei*, Junhong Qian, Chen Wu, Xiao Shi, Lei He.
  • [4] CCF-B TRETS Journal 2025 MCoreOPU: An FPGA-based Multi-Core Overlay Processor for Transformer-based Models. Shaoqiang Lu*, Tiandong Zhao*, Ting-Jung Lin, Rumin Zhang, Chen Wu, Lei He.
  • [5] IEEE ISEDA 2024 MCoreOPU: An FPGA-based Multi-Core Overlay Processor for Transformer-based Models. Shaoqiang Lu*, Tiandong Zhao*, Ting-Jung Lin, Rumin Zhang, Chen Wu, Lei He.
  • [6] CCF-B ICCAD 2024 ChatOPU: An FPGA-based Overlay Processor for Large Language Models with Unstructured Sparsity. Tiandong Zhao, Shaoqiang Lu, Chen Wu, Lei He.
  • [7] CCF-C ASAP 2025 (Best Paper Nomination)👉 METAL: A Memory-Efficient Transformer Architecture for Long-Context Inference on FPGA. Zicheng He, Shaoqiang Lu, Tiandong Zhao, Chen Wu, Lei He.
  • [8] CCF-C ASP-DAC 2026 dLLM-OPU: An FPGA Overlay Processor for Accelerated Diffusion Large Language Models. Yangbo Wei*, Shaoqiang Lu*, Junhong Qian, Chen Wu, Xiao Shi, Lei He.
  • [9] CCF-C FPT 2026 FlightOPU: An FPGA Overlay Processor for LLM with HBM-Aware Multi-Die Architecture. Chen Wu, Shaoqiang Lu, Yangbo Wei, Junhong Qian, Jinlong Yan, Zhanfei Chen, Rumin Zhang, Xiao Shi, Lei He.
  • [10] CCF-A AAAI 2026 Mixture-of-Trees: Learning to Select and Weigh Reasoning Paths for Efficient LLM Inference. Yangbo Wei, Zhen huang, Shaoqiang Lu, Junhong Qian, Dongge Qin, Ting Jung Lin, Wei Xing, Chen Wu, Lei He.
  • [11] CCF-C FPL 2023 Token Packing for Transformers with Variable-Length Inputs. Tiandong Zhao, Siyuan Miao, Shaoqiang Lu, Jialin Cao, Jun Qiu, Xiao Shi, Kun Wang, Lei He.
  • [12] CCF-B ISCAS 2026 Harnessing Spatiotemporal Redundancy for Fast Diffusion Models on FPGA. Dongge Qin, Junhong Qian, Shaoqiang Lu, Yangbo Wei, Ruizhe Deng, Xiao Shi, Chen Wu, Longxing Shi, Lei He.
  • [13] CCF-C FCCM 2025 C2OPU: Hybrid Compute-in-Memory and Coarse-Grained Reconfigurable Architecture for Overlay Processing of Transformers. Siyuan Miao, Lingkang Zhu, Chen Wu, Shaoqiang Lu, Jinming Lyu, Lei He.
  • [14] CCF-A Science China: Information Sciences 2025 FPGA Overlay processor for AI computing. He Lei, Wang Kun, Wu Chen, Tao Zhuofu, Shi Xiao, Miao Siyuan, Shaoqiang Lu.